iverilog - Icarus Verilog is a verilog compiler and simulator
| Website: | http://www.icarus.com/eda/verilog/index.html |
|---|---|
| License: | GPLv2 |
- Description:
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
Packages
| iverilog-0.9.20090423-1m.mo6.i686 [1.2 MiB] |
Changelog
by Masahiro Takahata (2009-07-29):
- (0.9.20081118-1m) - import from Fedora |