perl-Hardware-Verilog-Parser - Complete grammar for parsing Verilog code using perl
| Website: | http://search.cpan.org/dist/Hardware-Verilog-Parser/ |
|---|---|
| License: | GPL+ or Artistic |
- Description:
This module defines the complete grammar needed to parse any Verilog code. By overloading this grammar, it is possible to easily create perl scripts which run through Verilog code and perform specific functions.
Packages
| perl-Hardware-Verilog-Parser-0.13-7m.mo7.noarch [186 KiB] |
Changelog
by Yohsuke Ooi (2010-08-31):
- (0.13-7m) - full rebuild for mo7 release |